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Verification with UVM - Part 4

Table of Contents

Recap and Introduction to Final Phases

Review and Overview

  • Recap of DUT, testbench, and previous phases
  • Build and Connect Phases acknowledged

Introduction to the Run Phase

  • Main phase of simulation
  • Runs in parallel across components
  • Mention of auxiliary phases: End of Elaboration, Start of Simulation

The Run Phase: Orchestrating Simulation Flow

UVM Objection Mechanism

  • Simulation controlled via phase.raise_objection() and phase.drop_objection()
  • Usually handled in the top-level test and scoreboard

Stimulus Generation from the Test Run Phase

Test-level Control

  • Test creates and starts a virtual sequence
  • Example: word_format_poll_v_sequence

Virtual Sequences

uart_v_sequence_base

  • Extends uvm_sequence
  • Handles to sequencers and configs
  • init_v_sequence() sets everything up

word_format_poll_v_sequence

  • Extends base virtual sequence
  • Implements task body() to launch parallel sequences

DUT Configuration Sequence

uart_config_sequence

  • Configures LCR and divisor
  • Uses inline randomization
  • Uses RAL methods like .write() and read-back verification

Host Transmission Sequence

uart_host_TX_sequence

  • Polls LSR to check TX FIFO
  • Writes characters using RAL
  • Blocking operations

RX Side Serial Stimulus

uart_RX_sequence

  • Uses start_item() and finish_item()
  • Sends stimulus to RXD line
  • Parameterized with uart_sequence_item

Host-side Reception Sequence

uart_host_RX_sequence

  • Polls LSR and reads from RXD
  • Uses RAL model for reads
  • Ensures correlation with transmission

Checking: The Scoreboard's Run Phase

TLM Connections and Structure

  • APB Monitor → APB FIFO → Scoreboard
  • UART Monitor → UART FIFO → Scoreboard
  • Scoreboard → Coverage Monitor via analysis port

Run Phase Tasks

monitor_APB

  • Blocking get() on APB FIFO
  • Filters TXD writes
  • Pushes to internal data queue

monitor_uart

  • Blocking get() on UART FIFO
  • Reads LCR from RAL mirror (non-bus)
  • Compares reference and actual
  • Uses uvm_error for mismatches
  • Sends validated LCR data to coverage via analysis port

Functional Coverage: Sampling Covered Events

Coverage Monitor Design

uart_TX_coverage_monitor

  • Extends uvm_subscriber
  • Parameterized with LCR_item

Covergroup Integration

  • Declares covergroup (e.g., TX_word_format_CG)
  • Cross coverage of LCR bits
  • write() method samples covergroup using data from scoreboard

Reporting and Conclusion

End of Run and Report Phase

  • Run Phase ends with drop_objection()
  • report_phase() collects error counts
  • Determines pass/fail at test and scoreboard level

UVM Reporting Macros

  • uvm_info, uvm_warning, uvm_error, uvm_fatal
  • Standardized logging: timestamp, verbosity, file/line
  • Filterable based on verbosity level

Session Summary and Next Steps

  • Covered: connect, configure, stimulus, check, cover
  • Upcoming: deep dives into UVM phases, TLM, sequences, agent design